Zydis  v3.2.1
ZydisDecodedInstruction_::ZydisDecodedInstructionRaw_::ZydisDecodedInstructionRawEvex_ Struct Reference

Detailed info about the EVEX prefix. More...

#include <DecoderTypes.h>

Data Fields

ZyanU8 R
 Extension of the ModRM.reg field (inverted). More...
 
ZyanU8 X
 Extension of the SIB.index/vidx field (inverted). More...
 
ZyanU8 B
 Extension of the ModRM.rm or SIB.base field (inverted). More...
 
ZyanU8 R2
 High-16 register specifier modifier (inverted). More...
 
ZyanU8 mmm
 Opcode-map specifier. More...
 
ZyanU8 W
 64-bit operand-size promotion or opcode-extension. More...
 
ZyanU8 vvvv
 NDS/NDD (non-destructive-source/destination) register specifier (inverted). More...
 
ZyanU8 pp
 Compressed legacy prefix. More...
 
ZyanU8 z
 Zeroing/Merging. More...
 
ZyanU8 L2
 Vector-length specifier or rounding-control (most significant bit). More...
 
ZyanU8 L
 Vector-length specifier or rounding-control (least significant bit). More...
 
ZyanU8 b
 Broadcast/RC/SAE context. More...
 
ZyanU8 V2
 High-16 NDS/VIDX register specifier. More...
 
ZyanU8 aaa
 Embedded opmask register specifier. More...
 
ZyanU8 offset
 The offset of the first evex byte, relative to the beginning of the instruction, in bytes. More...
 

Detailed Description

Detailed info about the EVEX prefix.

Field Documentation

◆ aaa

ZyanU8 aaa

Embedded opmask register specifier.

◆ B

ZyanU8 B

Extension of the ModRM.rm or SIB.base field (inverted).

◆ b

ZyanU8 b

Broadcast/RC/SAE context.

◆ L

ZyanU8 L

Vector-length specifier or rounding-control (least significant bit).

◆ L2

ZyanU8 L2

Vector-length specifier or rounding-control (most significant bit).

◆ mmm

ZyanU8 mmm

Opcode-map specifier.

◆ offset

ZyanU8 offset

The offset of the first evex byte, relative to the beginning of the instruction, in bytes.

◆ pp

ZyanU8 pp

Compressed legacy prefix.

◆ R

ZyanU8 R

Extension of the ModRM.reg field (inverted).

◆ R2

ZyanU8 R2

High-16 register specifier modifier (inverted).

◆ V2

ZyanU8 V2

High-16 NDS/VIDX register specifier.

◆ vvvv

ZyanU8 vvvv

NDS/NDD (non-destructive-source/destination) register specifier (inverted).

◆ W

ZyanU8 W

64-bit operand-size promotion or opcode-extension.

◆ X

ZyanU8 X

Extension of the SIB.index/vidx field (inverted).

◆ z

ZyanU8 z

Zeroing/Merging.


The documentation for this struct was generated from the following file: